The inclusion of a capacitive decoupling network between the power and ground planes of a printed circuit board (PCB) is well known and desirable for a number of reasons. Specifically, decoupling capacitance may be provided in the form of discrete decoupling capacitors connected between the power and ground planes of the PCB, the discrete decoupling capacitors being located adjacent loads, which typically comprise integrated circuits (ICs) mounted on the PCB. Decoupling capacitance is also provided in the form of intrinsic (or interplanar) capacitance, particularly in multilayer PCBs, by the parallel location of the power and ground planes within a PCB. This decoupling capacitance serves to provide fast risetime current to the ICs and to minimize differential voltages that may develop between the power and ground planes of the PCB, as a result of IC switching events, by isolating the switching currents as "local events. This in turn reduces the potential of the PCB to radiate and conduct electromagnetic interference (EMI).
FIG. 1 shows an equivalent circuit 10 for an integrated circuit 12 and a decoupling capacitor (C.sub.d) 14 mounted on a PCB. The intrinsic or interplanar capacitance is represented by the capacitor (C.sub.0) 16. The power plane is represented by the line 18, and the ground plane by line 20.
The power plane of a PCB should ideally exhibit zero impedance, and it is desirable to minimize the impedance of power planes as much as possible. FIG. 2 is a graph showing power plane impedance (Z) versus frequency (MHz) for an example power-ground plane construction within a PCB having a number of discrete decoupling capacitors mounted thereon. The graph plots the impedance of the power plane, with the PCB configured as a "bare board" (i.e. a PCB without any discrete capacitors mounted thereon), with broken line 22, and the impedance of the power plane, with the PCB having discrete decoupling capacitors mounted thereon, with solid line 24. As is apparent from the graph, the impedance increases dramatically at operating frequencies above a series resonant frequency (f.sub.1) due, inter alia, to the presence of the discrete decoupling capacitors, and the impedance theoretically becomes infinite at a parallel resonant frequency (f.sub.3). The impedance of a PCB employing discrete decoupling capacitors comprises the cumulative impedance of the power and ground planes, vias connecting these planes, traces between capacitors and ICs, and the capacitor mounting pads. The significant increases in the power plane impedance at high frequencies results in the performance of the PCB deteriorating substantially at these frequencies, at which the PCB may not function properly, or may exceed regulatory emission levels.
The series resonant frequency (f.sub.1) is determined mainly by the number and location of the discrete decoupling capacitors. By optimizing the number and location of discrete decoupling capacitors, as well as other PCB characteristics, it is possible to shift the series resonant frequency (f.sub.1) to higher frequencies as increased operating frequencies are encountered. However, PCB operating frequencies are being achieved at which it has become increasingly difficult, inefficient and expensive to match the series resonant frequency (f.sub.1) to the PCB operating frequency.